Digitally-Controlled Polar Transmitter Using a Watt-Class Current-Mode Class-D CMOS Power Amplifier and Guanella Reverse Balun for Handset Applications

A digitally-controlled polar transmitter with a watt-class CMOS power amplifier is demonstrated, implemented in a 0.15 mu m RF CMOS process. Stacked FETs in a current-mode class-D configuration are used to obtain high breakdown voltage and high efficiency in the output stage, and a doughnut-shaped Guanella reverse balun is applied to achieve a 1-to-4 impedance transformation with less than 1 dB insertion loss. The amplifier has 31 dBm output power with 51% drain efficiency at 0.75 GHz frequency under single tone testing. The output stage is fed by a buck converter employing digital pulsewidth modulation with 47 MHz pulse rate synchronized with a 3 GHz clock. Digital compensation techniques were developed to maintain linearity. WCDMA HPSK modulation was demonstrated using a pulse pattern generator-based measurement bench. Overall efficiency of 26.5% was achieved while maintaining ACLRs within 3GPP specifications at 24 dBm average output power.