Integrated flip-chip flex-circuit packaging for power electronics applications

被引:21
作者
Xiao, Y [1 ]
Shah, HN
Natarajan, R
Rymaszewski, EJ
Chow, TP
Gutmann, RJ
机构
[1] Rensselaer Polytech Inst, Ctr Power Elect Syst, Troy, NY 12180 USA
[2] Int Rectifier, El Segundo, CA 90245 USA
基金
美国国家科学基金会;
关键词
flex-circuit; flip-chip; packaging parasitics; power electronics packaging; switching energy loss; voltage overshoot;
D O I
10.1109/TPEL.2003.820586
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel flip-chip flex-circuit packaging platform is described that enables integration of multiple power dies and control circuitry with an advantageous form factor. A key attribute of this packaging platform is to extend the well-established flex-circuit and flip-chip soldering technologies in signal electronics to power electronics applications. The planar interconnection and flip-chip method facilitate multilayer packaging structure with reduced packaging dimensions and reduced packaging parasitics. A half-bridge test vehicle designed and fabricated for dc/ac inverter applications (42 V, 16 A) with an overall flex-circuit module footprint less than 30% that of a discrete device printed circuit board implementation has been modeled and demonstrated experimentally. Electrical results, confirmed with circuit simulation incorporating parasitic inductance electromagnetic modeling, have shown a turn-off voltage overshoot reduction of over 40% and a switching energy loss reduction of 24% with the flip-chip flex-circuit implementation. The power flex platform has a strong potential for integrated multichip power module applications that require minimized packaging size and parasitic inductance for high switching frequency and efficiency.
引用
收藏
页码:515 / 522
页数:8
相关论文
共 24 条
[1]  
*ANS CORP, MAXW SI 3D VERS 4 0
[2]   Benchmark of power packaging for DC/DC and AC/DC converters [J].
Cheasty, P ;
Flannery, J ;
Meinhardt, M ;
Alderman, A ;
O'Mathúna, SC .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2002, 17 (01) :141-150
[3]  
FISHER R, 1995, P IEEE APPL POW EL C, P2
[4]  
GILLEO K, 1992, HDB FLEXIBLE CIRCUIT, pCH2
[5]  
Gutsmann B, 2000, IEEE POWER ELECTRON, P1291, DOI 10.1109/PESC.2000.880496
[6]   An innovative technique for packaging power electronic building blocks using metal posts interconnected parallel plate structures [J].
Haque, S ;
Xing, K ;
Lin, RL ;
Suchicital, CTA ;
Lu, GQ ;
Nelson, DJ ;
Borojevic, D ;
Lee, FC .
IEEE TRANSACTIONS ON ADVANCED PACKAGING, 1999, 22 (02) :136-144
[7]  
Krauter B, 1995, 1995 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, P45, DOI 10.1109/ICCAD.1995.479989
[8]  
Liang ZX, 2001, APPL POWER ELECT CO, P1057, DOI 10.1109/APEC.2001.912497
[9]   The semiconductor roadmap for power management in the new millennium [J].
Lidow, A ;
Kinzer, D ;
Sheridan, G ;
Tam, D .
PROCEEDINGS OF THE IEEE, 2001, 89 (06) :803-812
[10]  
LIDOW A, 1999, P APPL NOT POW CONV