共 14 条
HIERARCHICAL RESAMPLING ARCHITECTURE FOR DISTRIBUTED PARTICLE FILTERS
被引:0
作者:

Zheng, Ning
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机构:
Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China

Pan, Yun
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机构:
Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China

Yan, Xiaolang
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机构:
Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China

Huan, Ruohong
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h-index: 0
机构:
Zhejiang Univ Technol, Coll Comp Sci Technol, Hangzhou, Zhejiang, Peoples R China Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China
机构:
[1] Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China
[2] Zhejiang Univ Technol, Coll Comp Sci Technol, Hangzhou, Zhejiang, Peoples R China
来源:
2012 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH AND SIGNAL PROCESSING (ICASSP)
|
2012年
关键词:
Architecture;
distributed particle filters;
hierarchical resampling;
latency;
high memory efficiency;
ALGORITHMS;
SCHEME;
D O I:
暂无
中图分类号:
O42 [声学];
学科分类号:
070206 ;
082403 ;
摘要:
In this paper, a hierarchical resampling (HR) architecture has been presented for distributed particle filters (PFs). The proposed architectures decomposes the resampling step into two hierarchies, of which the first one, called intermediate resampling, is conducted consecutively among processing elements (PEs) the moment new particles and their weights are generated by each PE, and the second one, named unitary resampling, is performed sequentially after the whole intermediate resampling procedure and shared by all PEs. Compared with traditional distributed architectures, the HR architecture eliminates the particle redistribution step, and has such advantages as short execution time, high memory efficiency and well scalability.
引用
收藏
页码:1565 / 1568
页数:4
相关论文
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