Noise suppression in VLSI circuits using dummy metal fill

被引:0
作者
Gaskill, Steven [1 ]
Shilimkar, Vikas [1 ]
Weisshaar, Andreas [1 ]
机构
[1] Oregon State Univ, Sch Elect Engn & Comp Sci, Corvallis, OR 97331 USA
来源
2008 IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS | 2008年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Modem IC processes require metal fill patterning to achieve global uniformity of the metallization/oxide layers. Electrically these fills are often viewed as parasitics to be minimized. In this paper we actively use metal fill to suppress crosstalk noise between coupled traces by selectively grounding metal fills. However, the tradeoff of this improvement is higher total capacitance leading to increased interconnect delay times. We propose design rules that optimize this tradeoff between crosstalk and delay. The design parameters considered include placement of grounded fills, buffer distance and fill shapes. We show that it is best to start grounding metal fills farthest away from the signal traces.
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页码:249 / 252
页数:4
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