Design of a Delayless Feedback Path Free 2nd-order Two-Path Time-Interleaved Discrete-Time Delta-Sigma Modulator- a New Approach

被引:0
|
作者
Talebzadeh, Jafar [1 ]
Kale, Izzet [1 ]
机构
[1] Univ Westminster London, Dept Engn, Appl DSP & VLSI Res Grp, London W1W 6UW, England
来源
2017 1ST IEEE CONFERENCE ON PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS LATIN AMERICA (PRIME-LA) | 2017年
关键词
Time-Interleaved; Delta Sigma modulator; Signal-to-Noise Ratio;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
this paper presents the design procedure for a 2nd_order two-path Discrete-Time Time-Interleaved (DTTI) Delta Sigma modulator from a conventional single-loop 2nd-order Discrete-Time (DT) Delta Sigma modulator through the use of time domain equations and time-interleaving concepts [1]. The resulting modulator is free from the delayless feedback path and has only one set of integrators. The delayless feedback path issue in Time-Interleaved (TI) Delta Sigma modulators is a critical restriction for the implementation of TI Delta Sigma modulators and is effectively eliminated through the use of the approach proposed in this paper. The DTTI Delta Sigma modulator requires only three op-amps and two quantizers both of which work concurrently, in comparison to the single-loop DT counterpart that also deploys two op-amps. For an OverSampling Ratio (OSR) of 16 and a clock frequency of 640MHz, our simulation results show a maximum Signal-to-Noise Ratio (SNR) for the DTTI Delta Sigma modulator to be 70.5dB with an input bandwidth of 20MHz which has 15dB improvement in comparison to its single-loop, single-path DT counterpart.
引用
收藏
页码:13 / 16
页数:4
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