Asymmetric-Aware Scheduling for Single-ISA Asymmetric CMP Using Offline Analysis

Previous work has already testified from both theory and simulation that for enough diverse workload, heterogeneous chip multi-core processor(CMP) can deliver higher performance per watt over comparable homogeneous multi-core processor. But, the prerequisite is that operating system can recognize this diversity and then take an effective and reasonable task scheduling. We implemented an asymmetric-aware scheduler based on program behavior offline analysis, which makes up the shortcoming of online analysis and can achieve accurate thread-to-core initial assignment when a thread is created. Preliminary evaluation shows that our scheduler can gain performance improvement over default heterogeneous-agnostic scheduler and gain quality of service guaranteed.