Boosting the On-Current of Si-Based Tunnel Field-Effect Transistors

被引:4
作者
Verhulst, A. S. [1 ]
Vandenberghe, W. G. [1 ,2 ]
Leonelli, D. [1 ,2 ]
Rooyackers, R. [1 ]
Vandooren, A. [1 ]
Pourtois, G.
De Gendt, S. [1 ,3 ]
Heyns, M. M. [1 ,4 ]
Groeseneken, G. [1 ,2 ]
机构
[1] IMEC, Kapeldreef 75, B-3001 Louvain, Belgium
[2] Katholieke Univ Leuven, Dept Elect Engn, B-3001 Leuven, Belgium
[3] Katholieke Univ Leuven, Dept Chem, B-3001 Leuven, Belgium
[4] Katholieke Univ Leuven, Dept Met & Mat Engn, B-3001 Leuven, Belgium
来源
SIGE, GE, AND RELATED COMPOUNDS 4: MATERIALS, PROCESSING, AND DEVICES | 2010年 / 33卷 / 06期
关键词
FETS;
D O I
10.1149/1.3487567
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
Tunnel-FETs (TFETs) have the potential for a sub-60 mV/dec subthreshold swing and therefore allow for scaling the supply voltage beyond the 1 V plateau of metal-oxide-semiconductor FETs (MOSFETs). The latter scaling is a necessary condition for a reduction of the power consumption per transistor. Silicon-based TFETs are the most attractive because they allow for a full re-use of the existing expertise in fabricating silicon MOSFETs. However, the large bandgap of silicon results in low on-currents. Therefore, the incorporation of heterostructures is proposed. In particular, a germanium-source silicon-channel n-TFET and, as complementary p-TFET, an indium(gallium) arsenide-source silicon-channel TFET reach on-currents comparable to MOSFETs. To beat the MOSFET performance and allow ultra-low voltage operation, additional performance boosters are required. We analyze the impact of the device configuration and of heterostructure strain. The former is illustrated with experimental data of all-silicon FinFET-based TFETs.
引用
收藏
页码:363 / 372
页数:10
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