Evolutionary Algorithm based Combinational Circuit Design

被引：0

作者：

Rudra, Arun ^{[1
]}

Pandey, Neeta ^{[1
]}

Indu, S. ^{[1
]}

机构：

[1] Delhi Technol Univ, Dept Elect & Commun Engn, Delhi, India

来源：

2012 IEEE 5TH INDIA INTERNATIONAL CONFERENCE ON POWER ELECTRONICS (IICPE 2012) | 2012年

关键词：

Evolutionary algorithms; Evolvable hardware; genetic algorithm; Combinational logic circuit Verilog HDL; MATLAB;

D O I：

暂无

中图分类号：

TE [石油、天然气工业]; TK [能源与动力工程];

学科分类号：

0807 ; 0820 ;

摘要：

The hardware that allows autonomous reconfiguration to learn and adapt autonomously from the environment is called Evolvable hardware; employs evolutionary algorithms on PLDs so that the configuration may be changed without human intervention. The systems employed in dynamic operating conditions must be able to adapt to situation e. g. performance of the space system may vary due to sudden high radiation and self adaptation is needed to restore the performance as soon as possible. This paper, suggests a design method to evolve a Genetic algorithm (GA) based combinational logic circuit. The method is verified by designing an even parity generator circuit.

引用

页数：4

共 12 条

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