Heat Shunting by Innovative Source/Drain Contact to Enable Monolithic 3D Integration of InGaAs MOSFETs

被引：0
|
作者：
Kim, SangHyeon [1 ]
Kim, Seong Kwang [1 ]
Shin, SangHoon [2 ]
Han, Jae-Hoom [1 ]
Grum, Dae-Myeong [1 ]
Shim, Jae-Phil [1 ]
Lee, Subin [1 ]
Kim, Han Sung [1 ]
Ju, Gunwu [1 ]
Song, Jin Dong [1 ]
Alam, Muhammad A. [2 ]
Kim, Hyung-jun [1 ]
机构：
[1] KIST, Seoul, South Korea
[2] Purdue Univ, Dept ECE, W Lafayette, IN 47907 USA
来源：
2018 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2018年
基金：
新加坡国家研究基金会;
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页数：2
相关论文
共 50 条
  • [1] Monolithic 3D Integration of InGaAs Photodetectors on Si MOSFETs Using Sequential Fabrication Process
    Geum, Dae-Myeong
    Kim, Seong Kwang
    Lee, Subin
    Lim, Donghwan
    Kim, Hyung-Jun
    Choi, Chang Hwan
    Kim, Sang-Hyeon
    IEEE ELECTRON DEVICE LETTERS, 2020, 41 (03) : 433 - 436
  • [2] Innovative 3D integration of Power MOSFETs for synchronous Buck converters
    Herbsommer, Juan A.
    Noquil, J.
    Lopez, O.
    Jauregui, D.
    2011 TWENTY-SIXTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC), 2011, : 1273 - 1274
  • [3] Highly Stable Self-Aligned Ni-InGaAs and Non-Self-Aligned Mo Contact for Monolithic 3-D Integration of InGaAs MOSFETs
    Kim, Sanghyeon
    Kim, Seong Kwang
    Shin, Sanghoon
    Han, Jae-Hoon
    Geum, Dae-Myeong
    Shim, Jae-Phil
    Lee, Subin
    Kim, Hansung
    Ju, Gunwu
    Song, Jin Dong
    Alam, M. A.
    Kim, Hyung-Jun
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2019, 7 (01): : 869 - 877
  • [4] 3D monolithic integration
    Batude, P.
    Vinet, M.
    Pouydebasque, A.
    Le Royer, C.
    Previtali, B.
    Tabone, C.
    Hartmann, J. -M.
    Sanchez, L.
    Baud, L.
    Carron, V.
    Toffoli, A.
    Allain, F.
    Mazzocchi, V.
    Lafond, D.
    Deleonibus, S.
    Faynot, O.
    2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2011, : 2233 - 2236
  • [5] Hybrid InGaAs/SiGe CMOS Circuits with 2D and 3D Monolithic Integration
    Deshpande, V.
    Hahn, H.
    Djara, V.
    O'Connor, E.
    Caimi, D.
    Sousa, M.
    Fompeyrine, J.
    Czornomaz, L.
    2017 47TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC), 2017, : 244 - 247
  • [6] Monolithic 3D 6T-SRAM Based on Newly Designed Gate and Source/Drain Bottom Contact Schemes
    Lee, Junjong
    Yoon, Jun-Sik
    Jeong, Jinsu
    Lee, Seunghwan
    Lee, Sanguk
    Baek, Rock-Hyun
    IEEE ACCESS, 2021, 9 : 138192 - 138199
  • [7] Novel Germanium n-MOSFETs With Raised Source/Drain on Selectively Grown Ge on Si for Monolithic Integration
    Yu, Hyun-Yong
    Kobayashi, Masaharu
    Park, Jin-Hong
    Nishi, Yoshio
    Saraswat, Krishna C.
    IEEE ELECTRON DEVICE LETTERS, 2011, 32 (04) : 446 - 448
  • [8] High Performance n-MOSFETs with Novel Source/Drain on Selectively Grown Ge on Si for Monolithic Integration
    Yu, Hyun-Yong
    Kobayashi, Masaharu
    Jung, Woo Shik
    Okyay, Ali K.
    Nishi, Yoshio
    Saraswat, Krishna C.
    2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, 2009, : 641 - +
  • [9] Selective Wet Etching Process for Ni-InGaAs Contact Formation in InGaAs N-MOSFETs with Self-Aligned Source and Drain
    Subramanian, Sujith
    Ivana
    Zhou, Qian
    Zhang, Xingui
    Balakrishnan, Mahendran
    Yeo, Yee-Chia
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2012, 159 (01) : H16 - H21
  • [10] Wafer thinning for monolithic 3D integration
    Jindal, A
    Lu, JQ
    Kwon, Y
    Rajagopalan, G
    McMahon, JJ
    Zeng, AY
    Flesher, HK
    Cale, TS
    Gutmann, RJ
    MATERIALS, TECHNOLOGY AND RELIABILITY FOR ADVANCED INTERCONNECTS AND LOW-K DIELECTRICS-2003, 2003, 766 : 21 - 26
12345