Vulnerability assessment of fault-tolerant optical network-on-chips

被引:14
作者
Abdollahi, Meisam [1 ]
Mohammadi, Siamak [1 ]
机构
[1] Univ Tehran, Sch Elect & Comp Engn, Tehran, Iran
基金
美国国家科学基金会;
关键词
Fault-tolerant; Optical network on chip; Mesh topology; Application mapping; Vulnerability assessment; PHOTONIC NOC; POWER;
D O I
10.1016/j.jpdc.2020.06.016
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Multi/Many-core systems based on the traditional electrical network-on-chip are confronted with the limited bandwidth, high latency, and reliability challenges. The emerging optical solution of silicon photonics has promised to improve the design parameters of electrical interconnections for future multiprocessor system on chips. Although the optical network-on-chip has advantages in terms of reliability compared to the electrical ones, important phenomena such as crosstalk noise, process variation, and temperature fluctuations must be carefully considered. These physical challenges have substantial adverse effects on the correct functionality of on-chip optical devices such as microring resonator and the optical waveguide. Malfunction of these elements may cause the injection of faults that should be tolerated by the reliable system. In this paper, we have assessed the effect of the fault-tolerant design of optical routers on the reliability parameters through application mapping. We propose a fault-tolerant algorithm to modify optical routers to improve the reliability parameter. The vulnerability analysis of the proposed algorithm shows that besides obtaining the fault-tolerant capability in optical routers, only about 9.63% and 19.29% of SNR decrease for real-world applications and seven traditional optical routers are achieved in the case of a single fault and two faults injections, respectively. (C) 2020 Elsevier Inc. All rights reserved.
引用
收藏
页码:140 / 159
页数:20
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