VHDL core for 1024-point radix-4 FFT computation

被引:0
|
作者
Alberto, VFJ [1 ]
de Jesus, RTR [1 ]
Alejandro, OM [1 ]
机构
[1] Univ Guanajuato, FIMEE, Salamanca 36730, Guanajuato, Mexico
来源
2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2005) | 2005年
关键词
FFT; HSP; VHDL; IP cores;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx (R) Spartan (TM)-3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a low-cost. resource efficient core for spectrum analysis applications.
引用
收藏
页码:163 / 166
页数:4
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