Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers

被引:106
作者
Leon, Vasileios [1 ]
Zervakis, Georgios [1 ]
Soudris, Dimitrios [1 ]
Pekmestzi, Kiamal [1 ]
机构
[1] Natl Tech Univ Athens, Sch Elect & Comp Engn, Athens 15780, Greece
基金
欧盟地平线“2020”;
关键词
Approximate computing; error resiliency; low power; radix encodings; signed multipliers; LOW-POWER; BOOTH MULTIPLIERS; HIGH-SPEED; DESIGN;
D O I
10.1109/TVLSI.2017.2767858
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Approximate computing forms a design alternative that exploits the intrinsic error resilience of various applications and produces energy-efficient circuits with small accuracy loss. In this paper, we propose an approximate hybrid high radix encoding for generating the partial products in signed multiplications that encodes the most significant bits with the accurate radix-4 encoding and the least significant bits with an approximate higher radix encoding. The approximations are performed by rounding the high radix values to their nearest power of two. The proposed technique can be configured to achieve the desired energy-accuracy tradeoffs. Compared with the accurate radix-4 multiplier, the proposed multipliers deliver up to 56% energy and 55% area savings, when operating at the same frequency, while the imposed error is bounded by a Gaussian distribution with near-zero average. Moreover, the proposed multipliers are compared with state-of-the-art inexact multipliers, outperforming them by up to 40% in energy consumption, for similar error values. Finally, we demonstrate the scalability of our technique.
引用
收藏
页码:421 / 430
页数:10
相关论文
共 32 条
  • [1] [Anonymous], 2010, CMOS VLSI Design: A Circuits and Systems Perspective
  • [2] [Anonymous], 1968, STANFORD ARTIFICIAL
  • [3] [Anonymous], 2015, 32 ICML
  • [4] An iterative logarithmic multiplier
    Babic, Z.
    Avramovic, A.
    Bulic, P.
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 2011, 35 (01) : 23 - 33
  • [5] Chakradhar ST, 2010, DES AUT CON, P865
  • [6] Chippa V.K., 2013, Design Automation Conference (DAC), 2013 50th ACM / EDAC / IEEE, P1, DOI [10.1145/2463209.2488873, DOI 10.1145/2463209.2488873]
  • [7] Design of low-error fixed-width modified booth multiplier
    Cho, KJ
    Lee, KC
    Chung, JG
    Parhi, KK
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2004, 12 (05) : 522 - 531
  • [8] Gupta V., 2011, 2011 International Symposium on Low Power Electronics and Design (ISLPED 2011), P409, DOI 10.1109/ISLPED.2011.5993675
  • [9] Low-Power Digital Signal Processing Using Approximate Adders
    Gupta, Vaibhav
    Mohapatra, Debabrata
    Raghunathan, Anand
    Roy, Kaushik
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2013, 32 (01) : 124 - 137
  • [10] Hashemi S, 2015, ICCAD-IEEE ACM INT, P418, DOI 10.1109/ICCAD.2015.7372600