Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation

被引：4

作者：

Yahya, Eslam ^{[1
,2
]}

Fesquet, Laurent ^{[3
]}

Ismail, Yehea ^{[1
]}

Renaudin, Marc ^{[4
]}

机构：

[1] Amer Univ Cairo, CND, Zewail City Sci & Technol Cairo, Cairo, Egypt

[2] Benha Univ, Fac Engn, Banha, Egypt

[3] TIMA Lab, Grenoble, France

[4] TIEMPO SAS, Montbonnot St Martin, France

来源：

2013 IEEE 19TH INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS (ASYNC) | 2013年

关键词：

Conditional Asynchronous Circuits; Performance; Analysis; SSTA for Asynchronous Circuits; STA; Delay Variability; TIME SEPARATION; EVENTS; ALGORITHM;

D O I：

10.1109/ASYNC.2013.12

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Asynchronous designs are usually composed of conditional circuits. The analysis of these circuits is complex especially when delay variability is considered. In this paper, we design and implement a model-based Statistical Static Timing Analysis "SSTA" framework that is able to analyze conditional asynchronous circuits in efficient time. First, the paper introduces how the conditional circuits can be modeled; and then it shows how this model can be used to realize the SSTA analysis.

引用

页码：67 / 74

页数：8

共 24 条

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