FPGA Acceleration of Multilevel ORB Feature Extraction for Computer Vision

被引:0
|
作者
Weberruss, Josh [1 ,3 ]
Kleeman, Lindsay [1 ]
Boland, David [2 ]
Drummond, Tom [1 ,3 ]
机构
[1] Monash Univ, Clayton, Vic, Australia
[2] Univ Sydney, Sydney, NSW, Australia
[3] Australian Ctr Excellence Robot Vis, Brisbane, Qld, Australia
来源
2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL) | 2017年
基金
澳大利亚研究理事会;
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present the first multilevel implementation of the Harris-Stephens corner detector and the ORB feature extractor running on FPGA hardware, for computer vision and robotics applications. ORB is a fundamental component of many robotics applications, and requires significant computation. The design has been validated both in behavioural simulation and in implementation on an Arria V FPGA connected to a desktop PC via PCI-Express. A Linux kernel-mode driver and userspace library allow integration of the acceleration hardware into C++ programs. The device has significantly higher throughput than a CPU implementation (150 MPixel/s vs 27 MPixel/s) and a GPU implementation (40 MPixel/s), with much lower power draw (5.3 W vs 145 W). This throughput is equivalent to 72 fps at 1920 x 1080 or 488 fps at 640 x 480.
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页数:8
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