Revolutionary Nanoelectronic Devices and Processes for Post 32nm CMOS Era

被引：4

作者：

Nishi, Yoshio ^{[1
]}

机构：

[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA

来源：

ADVANCED GATE STACK, SOURCE/DRAIN, AND CHANNEL ENGINEERING FOR SI-BASED CMOS 5: NEW MATERIALS, PROCESSES, AND EQUIPMENT | 2009年 / 19卷 / 01期

关键词：

FILMS;

D O I：

10.1149/1.3118926

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

Possible device structure alternatives and material alternatives for CMOS beyond 32nm technology node are discussed placing emphasis on active device performance enhancement. Issues on metal gate/high k coupled with high mobility materials and opportunity for possible functional replacement of conventional devices, especially in memory devices, are discussed.

引用

页码：3 / 14

页数：12

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