In order to apply nonmonotonic logics for specifying industrial automation controllers, we define (1) a method to extend atemporal nonmonotonic logics with temporal operators and (2) a mapping of these new temporal nonmonotonic logics into a Metric Temporal Logic. This mapping provides a formal specification method for real-time temporal reasoning digital circuits for the temporal nonmonotonic logics. We present our method in the context of synthesizing custom digital hardware (called agent chip) automatically from high level agent specifications.
机构:
UNIV ROMA LA SAPIENZA,DIPARTIMENTO INFORMAT & SISTEMIST,I-00198 ROME,ITALYUNIV ROMA LA SAPIENZA,DIPARTIMENTO INFORMAT & SISTEMIST,I-00198 ROME,ITALY
Donini, FM
Nardi, D
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UNIV ROMA LA SAPIENZA,DIPARTIMENTO INFORMAT & SISTEMIST,I-00198 ROME,ITALYUNIV ROMA LA SAPIENZA,DIPARTIMENTO INFORMAT & SISTEMIST,I-00198 ROME,ITALY
Nardi, D
Rosati, R
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UNIV ROMA LA SAPIENZA,DIPARTIMENTO INFORMAT & SISTEMIST,I-00198 ROME,ITALYUNIV ROMA LA SAPIENZA,DIPARTIMENTO INFORMAT & SISTEMIST,I-00198 ROME,ITALY
机构:
Dipartimento di Information e Sistemistica, Università di Roma La Sapienza, 00198 RomaDipartimento di Information e Sistemistica, Università di Roma La Sapienza, 00198 Roma
机构:
Tel Aviv Univ, Beverly Sackler Fac Exact Sci, Dept Comp Sci, IL-69978 Tel Aviv, IsraelTel Aviv Univ, Beverly Sackler Fac Exact Sci, Dept Comp Sci, IL-69978 Tel Aviv, Israel
机构:
Siberian Fed Univ, Inst Math & Informat, Krasnoyarsk, Russia
AP Ershov Inst Informat Syst, Novosibirsk, RussiaSiberian Fed Univ, Inst Math & Informat, Krasnoyarsk, Russia