Three-terminal silicon surface junction tunneling device for room temperature operation

被引:58
作者
Koga, J [1 ]
Töriumi, A [1 ]
机构
[1] Toshiba Corp, Adv LSI Technol Lab, Yokohama, Kanagawa 2358522, Japan
关键词
negative differential conductance; silicon-on-insulator; tunneling device;
D O I
10.1109/55.791932
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This letter reports excellent negative differential conductance (NDC) characteristics at room temperature in a three-terminal silicon surface junction tunneling (Si SJT) device; with the peak-to-valley current ratio of more than two. The tunneling device was fabricated on a SIMOX wafer to achieve an extremely small bulk leakage current together with a sharp drain impurity profile. In addition, a ring-shaped gate structure was employed to eliminate the effect of the field oxide corner, resulting in the significant reduction of an excess tunneling current at the tunneling junction. As a simple circuit demonstration, gate controlled latch characteristics are also shown, which cannot be easily achieved by a two-terminal tunneling device.
引用
收藏
页码:529 / 531
页数:3
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