A low power and low phase-noise 91∼96 GHz VCO in 90 nm CMOS

被引:1
作者
Lin, Yo-Sheng [1 ]
Lan, Kai-Siang [1 ]
Chuang, Ming-Yuan [1 ]
Lin, Yu-Ching [1 ]
机构
[1] Natl Chi Nan Univ, Dept Elect Engn, Puli, Taiwan
关键词
CMOS; VCO; tuning range; LC network; negative capacitance; series peaking; output power; phase noise; LC-VCO; DESIGN;
D O I
10.1080/00207217.2018.1426116
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper reports a 94 GHz CMOS voltage-controlled oscillator (VCO) using both the negative capacitance (NC) technique and series-peaking output power and phase noise (PN) enhancement technique. NC is achieved by adding two variable LC networks to the source nodes of the active circuit of the VCO. NMOSFET varicaps are adopted as the required capacitors of the LC networks. In comparison with the conventional one, the proposed active circuit substantially decreases the input capacitance (C-in) to zero or even a negative value. This leads to operation (or oscillation) frequency (OF) increase and tuning range (TR) enhancement of the VCO. The VCO dissipates 8.3mW at 1V supply. The measured TR of the VCO is 91 similar to 96 GHz, close to the simulated (92.1 similar to 96.7 GHz) and the calculated one (92.2 similar to 98.2 GHz). In addition, at 1MHz offset from 95.16 GHz, the VCO attains an excellent PN of - 98.3 dBc/Hz. This leads to a figure-of-merit (FOM) of -188.5 dBc/Hz, a remarkable result for a V- or W-band CMOS VCO. The chip size of the VCO is 0.75x0.42mm(2), i.e. 0.315mm(2).
引用
收藏
页码:1063 / 1077
页数:15
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