Various SEU conditions in SRAM studied by 3-D device simulation

被引:37
作者
Castellani-Coulié, K
Palau, JM
Hubert, G
Calvet, MC
Dodd, PE
Sexton, F
机构
[1] Univ Montpellier 2, F-34095 Montpellier 05, France
[2] Sandia Natl Labs, Albuquerque, NM 87185 USA
[3] EADS, LV, F-78133 Les Mureaux, France
关键词
critical charge; device simulation; sensitive regions; single-event upset (SEU); SEU mechanisms; SRAM sensitivity;
D O I
10.1109/23.983153
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Various single-event upset (SEU) conditions are studied by three-dimensional device simulation with the purpose of going deeply into the understanding of the mechanisms governing the SEU sensitivity for a large variety of tracks. The results give a better view of what regions are sensitive. They clearly point out that some generally accepted notions must be revised as considering the normal incidence case to be the most sensitive or neglecting PMOS contribution.
引用
收藏
页码:1931 / 1936
页数:6
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