Input pattern classification for transistor level testing of bridging faults in BiCMOS circuits

被引：0
|
作者：
Menon, SM [1 ]
Jayasumana, AP [1 ]
Malaiya, YK [1 ]
机构：
[1] S DAKOTA SCH MINES & TECHNOL,DEPT ELECT & COMP ENGN,RAPID CITY,SD 57701
来源：
SIXTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/GLSV.1996.497622
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：214 / 219
页数：6
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