Temperature-aware writing architecture for multilevel memristive cells

The high potential of memristors as multilevel resistance devices. Memristors are promising but suffer from their non-linear behaviour and a strong dependency on different sources of variability (process, voltage, temperature ... ). Temperature variations are specially harmful because a small thermal variation changes the operation point of the device in a conclusive way. For these reasons the circuitry required to accurately read or write multilevel devices is complex and area demanding. This paper presents a time-domain architecture based on variable pulses that is able to write different levels in the memristive cell. It is resilient to temperature changes based on an in depth analysis of the definition of the resistance levels. Furthermore, the proposed architecture takes advantage of logarithmic counters to save area. Experimental results show that the proposed approach is valid for a wide temperature range.