Si and Ge nanocrystals for future memory devices

被引:40
作者
Bonafos, C. [1 ]
Carrada, M. [1 ]
Benassayag, G. [1 ]
Schamm-Chardon, S. [1 ]
Groenen, J. [1 ]
Paillard, V. [1 ]
Pecassou, B. [1 ]
Claverie, A. [1 ]
Dimitrakis, P. [2 ]
Kapetanakis, E. [2 ]
Ioannou-Sougleridis, V. [2 ]
Normand, P. [2 ]
Sahu, B. [3 ]
Slaoui, A. [3 ]
机构
[1] Univ Toulouse, CNRS, Nmat Grp, CEMES, F-31055 Toulouse 4, France
[2] Demokritos Natl Ctr Sci Res, Inst Microelect, GR-15310 Athens, Greece
[3] CNRS, InESS, F-67037 Strasbourg, France
关键词
Nanocrystals; Non-volatile memory; Ion implantation; ION-BEAM-SYNTHESIS; SILICON NANOCRYSTALS; NONVOLATILE MEMORY; ENERGY; LAYERS; PHOTOLUMINESCENCE; IMPLANTATION; INTEGRATION; ARRAYS; OXIDES;
D O I
10.1016/j.mssp.2012.09.004
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An attractive alternative for extending the scaling of Flash-type memories is to replace the conventional floating gate (a poly-Si layer) by laterally isolated floating nodes in the form of nanoparticles. This floating-gate concept has led to the emergence of the so-called nanocrystal (NC) memories which have the potential of operating at lower voltages and higher speeds compared to the conventional non-volatile memories (NVMs) without compromising the criterion of non-volatility. NC memories also offer other advantages like a better immunity to the crosstalk effect arising from the floating-gate coupling of closely spaced adjacent cells and an increased design flexibility from which quantum confinement phenomena can be judiciously exploited for enhanced memory functionality. Among the different technological routes explored in the last few years for generating nanocrystals in the gate insulator of MOS devices, two major techniques have been utilized, namely deposition in vacuum and ion beam synthesis. During the last decade, we have extensively explored the ultra-low-energy ion-beam-synthesis (ULE-IBS) technique to produce single planes of Si-NCs in very thin (5-10 nm) insulator layers. This review summarizes more than 10 years of research efforts we and other groups have dedicated to the fabrication of NCs memories using this original technique. By exploiting the flexibility of the ULE-IBS route, Si-NCs single-transistor NVM cells using "classical" gate oxides (SiO2) have been successfully realized. More recently, advanced dielectric stacks employing high-kappa dielectric (HfO2) as tunnel oxide and SiN as control oxide and host matrix for Si and Ge-NCs, have been fabricated and show promising performance for low-voltage operating-NVM devices. Particular emphasis is placed herein on material science issues such as anomalous and controlled oxidation processes. While much research is still needed for making reliable and competitive NC NVMs, our systematic investigations based on the ULE-IBS option demonstrate that a tight control and understanding of the properties of NCs memory cells can be achieved, provided that deep structural characterization is coupled to electrical studies. (C) 2012 Elsevier Ltd. All rights reserved.
引用
收藏
页码:615 / 626
页数:12
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