A 1-V high-speed MTCMOS circuit scheme for power-down application circuits

被引:140
作者
Shigematsu, S [1 ]
Mutoh, S [1 ]
Matsuya, Y [1 ]
Tanabe, Y [1 ]
Yamada, J [1 ]
机构
[1] NIPPON TELEGRAPH & TEL PUBL CORP, DEPT TECHNOL, TOKYO, JAPAN
关键词
circuit design; circuit optimization; CMOS digital integrated circuits; flip-flops; low-power circuit; low-voltage CMOS;
D O I
10.1109/4.585288
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a new multithreshold-voltage CMOS circuit (MTCMOS) concept aimed at achieving highspeed, ultralow-power large-scale integrators (LSI's) for battery-driven portable equipment, The ''balloon'' circuit scheme based on this concept preserves data during the power-down period in which the power supply to the circuit is cut off in order to reduce the standby power, Low-power, high-speed performance is achieved by the small preserving circuit which can be separated from the critical path of the logic circuit, This preserving circuit is not only three times faster than a conventional MTCMOS one, but it consumes half the power and takes up half the area, Using this scheme for an LSI chip, 20-MHz operation at 1.0 V and only a few mi standby current was achieved with 0.5-mu m CMOS technology, Moreover, this scheme is effective for high-speed and low-power operation in quarter-micrometer and finer devices.
引用
收藏
页码:861 / 869
页数:9
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