Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation

As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient Multithreaded programs to lie executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications. (c) 2008 Elsevier B.V. All rights reserved.