A Low-Cost Carry Look-Ahead Adder for Flying-Adder Frequency Synthesizer

被引:0
|
作者
Chen, Pao-Lung [1 ]
机构
[1] Natl Kaohsiung First Univ Sci & Technol, Kaohsiung, Taiwan
来源
2016 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS-TAIWAN (ICCE-TW) | 2016年
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a compact and cost-effective carry look-ahead adder for fractional accumulator in flying-adder frequency synthesizer. The fractional accumulator design is critical in flying-adder frequency synthesizer. Conventional carry look-ahead adder is replaced with a two-bit carry look-ahead adder and another D flip-flop to serve as basic module to construct the adder. The power consumption is approximately 59% of conventional approach. The proposed method eliminates the large gate area in conventional method that can greatly reduce the hardware cost. Measurements show that the output frequency error is less than 3 ppm.
引用
收藏
页码:365 / 366
页数:2
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