Impact of series resistance on Si nanowire MOSFET performance

被引:14
作者
Kaushal, G. [1 ]
Manhas, S. K. [1 ]
Maheshwaram, S. [1 ]
Dasgupta, S. [1 ]
机构
[1] Indian Inst Technol, Dept Elect & Comp Engn, Roorkee 247667, Uttar Pradesh, India
关键词
Gate-All-Around; Si-nanowire FET; Series resistance; GATE; SIMULATION; GRADIENT; MODEL;
D O I
10.1007/s10825-013-0449-8
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In gate all around (GAA) nanowire (NW) MOSFETs large series resistance due to narrow width extension regions is an important issue, playing a critical role in determining device and circuit performance. In this paper, we present a series resistance model and analyze its dependence on geometry/process parameters. The series resistance is modelled by dividing it into five resistance components namely spreading resistance, extension resistance, interface resistance, deep source-drain resistance and contact resistance. The model is validated using 3-D device simulations of 22 nm GAA devices with Source/Drain extension (SDE) length of 15 nm to 35 nm, diameter of 8 nm to 16 nm and oxide thickness of 10 A to 40 A for both n-FET and p-FET. It is found that the spreading resistance due to lateral doping gradient contributes significantly to the total series resistance. Further, the dependence of NW device performance on series resistance is quantitatively investigated with change of diameter, SDE length and Source/Drain (S/D) implantation dose. Results show a strong NW device performance dependence on S/D doping profile and extension length defining a design trade-off between Short Channel Effects (SCEs) and series resistance. It is seen that the increase in series resistance due to increase of extension length or decrease of implantation dose beyond a certain limit reduces the device drive current significantly with nearly constant OFF-state leakage current. Hence, optimization of extension length and S/D implant dose is an important device design issue for sub 22 nm technology nodes.
引用
收藏
页码:306 / 315
页数:10
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