Four-Element Wide Modulated Bandwidth MIMO Receiver With >35-dB Interference Cancellation

被引:10
作者
Ghaderi, Erfan [1 ]
Ramani, Ajith Sivadhasan [2 ]
Rahimi, Arya A. [1 ]
Heo, Deukhyoun [1 ]
Shekhar, Sudip [2 ]
Gupta, Subhanshu [1 ]
机构
[1] Washington State Univ, Sch Elect Engn & Comp Sci, Pullman, WA 99163 USA
[2] Univ British Columbia, Dept Elect & Comp Engn, Vancouver, BC V6T 1Z4, Canada
基金
美国国家科学基金会; 加拿大自然科学与工程研究理事会;
关键词
Frequency modulation; Delays; Receivers; Phased arrays; Bandwidth; Interference cancellation; Discrete-time-delay (TD)-compensating; multiple-input multiple-output (MIMO) receiver array; spatial interference cancellation (SpICa); truncated Hadamard matrix; wide modulated bandwidth (BW); ARRAY;
D O I
10.1109/TMTT.2020.2986441
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Active control of interference is necessary with increased cell density, more complicated environmental reflections, and coexistence of multiple networks for next-generation wireless communications. The existing radio receiver architectures for spatial interference cancellation (SpICa) are limited by the spatial nulls created by a phased-antenna array (PAA) and cannot cover wide modulated bandwidths (BWs). We propose a discrete-time-delay-compensating technique for canceling spatial interferences with wide modulated BWs to reduce the dynamic range requirement for the data converter. Integral to the proposed circuit is a switched-capacitor-based multiply-and-accumulate processor that incorporates a reconfigurable phase interpolator and time interleaver for precise digitally tunable delays and multiplication of the input signal to an orthogonal matrix. The digital time interleaver enables 5-ps resolution with a reconfigurable range up to 15 ns. The measured results demonstrate greater than 35-dB SpICa over 80-MHz modulated BWs in the 65-nm CMOS with 52 mW of power consumption.
引用
收藏
页码:3930 / 3941
页数:12
相关论文
共 24 条
  • [1] [Anonymous], 2019, IEEE T MICROW THEORY, DOI DOI 10.1109/TMTT.2019.2916788
  • [2] Bakr O., 2000, UCBEECS20091 EECS DE
  • [3] Cho MK, 2018, IEEE RAD FREQ INTEGR, P272, DOI 10.1109/RFIC.2018.8428977
  • [4] A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers
    El Sayed, Ahmed
    Mishra, Amit K.
    Ahmed, Abdelrahman H.
    Shirazi, Amir Hossein Masnadi
    Woo, Sang-Pil
    Choi, Yang-Seok
    Mirabbasi, Shahriar
    Shekhar, Sudip
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (03) : 1153 - 1165
  • [5] An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers
    Ghaderi, Erfan
    Ramani, Ajith Sivadhasan
    Rahimi, Arya A.
    Heo, Deukhyoun
    Shekhar, Sudip
    Gupta, Subhanshu
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (09) : 3296 - 3306
  • [6] Ghaffari A, 2013, ISSCC DIG TECH PAP I, V56, P84, DOI 10.1109/ISSCC.2013.6487647
  • [7] TRUE TIME-DELAY BANDPASS BEAMFORMING
    HORVAT, DCM
    BIRD, JS
    GOULDING, MM
    [J]. IEEE JOURNAL OF OCEANIC ENGINEERING, 1992, 17 (02) : 185 - 192
  • [8] A Full-FoV Autonomous Hybrid Beamformer Array With Unknown Blockers Rejection and Signals Tracking for Low-Latency 5G mm-Wave Links
    Huang, Min-Yu
    Chi, Taiyun
    Wang, Fei
    Li, Tso-Wei
    Wang, Hua
    [J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2019, 67 (07) : 2964 - 2974
  • [9] Huang MY, 2019, ISSCC DIG TECH PAP I, V62, P346, DOI 10.1109/ISSCC.2019.8662425
  • [10] Jain S, 2016, IEEE RAD FREQ INTEGR, P99, DOI 10.1109/RFIC.2016.7508260