High performance picture-in-picture (PiP) IC using embedded DRAM technology

被引：8

作者：

Brett, M ^{[1
]}

Wendel, D ^{[1
]}

机构：

[1] Infineon Technol, D-81541 Munich, Germany

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1999年 / 45卷 / 03期

关键词：

D O I：

10.1109/30.793574

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper the next generation of a low cost, high performance single-chip picture-in-picture IC is presented. This chip will be produced in a 0.35 mu eDRAM technology and integrates a digital multistandard color decoder, embedded DRAM, A/D and D/A converters as well as a data slicer for caption services. The paper deals with the digital video signal processing for color decoding with asynchronous sampling and the compensation of the skew. A new algorithm for a jointline-free true frame display was developed. The chip allows a smooth scaling from 1/81 to 1/4 of full-screen picture size and implements a data compression algorithm for split-screen modes.

引用

页码：698 / 705

页数：8