Layer-by-Layer-Assembled Reduced Graphene Oxide/Gold Nanoparticle Hybrid Double-Floating-Gate Structure for Low-Voltage Flexible Flash Memory

被引：159

作者：

Han, Su-Ting ^{[1
,2
]}

Zhou, Ye ^{[1
,2
]}

Wang, Chundong ^{[1
,2
]}

He, Lifang ^{[1
,2
]}

Zhang, Wenjun ^{[1
,2
]}

Roy, V. A. L. ^{[1
,2
]}

机构：

[1] City Univ Hong Kong, Dept Phys & Mat Sci, Kowloong Tong, Hong Kong, Peoples R China

[2] City Univ Hong Kong, Ctr Super Diamond & Adv Films COSDAF, Kowloong Tong, Hong Kong, Peoples R China

来源：

ADVANCED MATERIALS | 2013年 / 25卷 / 06期

关键词：

reduced graphene oxide; gold nanoparticles; hybrid double floating gates; low voltage; flexible flash memory; DEVICES; TRANSISTORS; DEPOSITION; TRANSPORT;

D O I：

10.1002/adma.201203509

中图分类号：

O6 [化学];

学科分类号：

0703 ;

摘要：

A hybrid double-floating-gate flexible memory device by utilizing an rGO-sheet monolayer and a Au NP array as upper and lower floating gates is reported. The rGO buffer layer acts as a charge-trapping layer and introduces an energy barrier between the Au NP lower floating gate and the channel. The proposed memory device demonstrates a strong improvement in both field-effect-transistor (FET) and memory characteristics.

引用

收藏

页码：872 / 877

页数：6

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