A cyclic CMOS time-to-digital converter with deep sub-nanosecond resolution

被引：25

作者：

Chen, P ^{[1
]}

Liu, SI ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10764, Taiwan

来源：

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 1999年

关键词：

D O I：

10.1109/CICC.1999.777354

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A novel cyclic time-to-digital converter (TDC) is proposed in this paper. The measured resolution (or LSB width equivalent) can reach 68 picoseconds, and the corresponding single-shot errors are around 1/2 LSB width. Under a single 3.3V power supply, the stand-by current consumption is measured to be 0.3 mA only, including the I/O pads. The operation current consumption is measured to be 370 uA under 100 k/sec measurement rate.

引用

页码：605 / 608

页数：4

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