NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory

被引：865

作者：

Dong, Xiangyu ^{[1
]}

Xu, Cong ^{[2
]}

Xie, Yuan ^{[2
]}

Jouppi, Norman P. ^{[3
]}

机构：

[1] Qualcomm Inc, San Diego, CA 92121 USA

[2] Penn State Univ, Dept Comp Sci & Engn, University Pk, PA 16802 USA

[3] Hewlett Packard Labs, Intelligent Infrastruct Lab, Palo Alto, CA 94304 USA

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2012年 / 31卷 / 07期

基金：

美国国家科学基金会;

关键词：

Analytical circuit model; MRAM; NAND Flash; nonvolatile memory; phase-change random-access memory (PCRAM); resistive random-access memory (ReRAM); spin-torque-transfer memory (STT-RAM); RANDOM-ACCESS MEMORY; PRAM;

D O I：

10.1109/TCAD.2012.2185930

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Various new nonvolatile memory (NVM) technologies have emerged recently. Among all the investigated new NVM candidate technologies, spin-torque-transfer memory (STT-RAM, or MRAM), phase-change random-access memory (PCRAM), and resistive random-access memory (ReRAM) are regarded as the most promising candidates. As the ultimate goal of this NVM research is to deploy them into multiple levels in the memory hierarchy, it is necessary to explore the wide NVM design space and find the proper implementation at different memory hierarchy levels from highly latency-optimized caches to highly density-optimized secondary storage. While abundant tools are available as SRAM/DRAM design assistants, similar tools for NVM designs are currently missing. Thus, in this paper, we develop NVSim, a circuit-level model for NVM performance, energy, and area estimation, which supports various NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies.

引用

页码：994 / 1007

页数：14

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