A 4th-order active-Gm-RC reconfigurable (UMTS/WLAN) filter

被引:92
作者
D'Amico, Stefano [1 ]
Giannini, Vito [1 ]
Baschirotto, Andrea [1 ]
机构
[1] Univ Lecce, Dept Innovat Engn, I-73100 Lecce, Italy
关键词
analog filter; reconfigurable receiver; UMTS; WLAN;
D O I
10.1109/JSSC.2006.873676
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A fourth-order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented. The filter uses the cascade of two Active-G(m)-RC biquad cells. A single opamp is used for each biquad and its unity-gain-bandwidth is comparable to the filter cut-off frequency. Thus, the opamp power consumption is strongly reduced w.r.t. other closed-loop filter configurations. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by an on-chip tuning circuit. The device in a 0.13 mu m CMOS technology occupies a 0.9 mm(2) area and it consumes 3.4 mW and 114.2 mW for the UNITS and WLAN, respectively. The full chip has been designed using an automatic design tool, which is validated by the agreement between the experimental results and the expected performance.
引用
收藏
页码:1630 / 1637
页数:8
相关论文
共 21 条
[1]   A Gm-C low-pass filter for zero-IF mobile applications with a very wide tuning range [J].
Chamla, D ;
Kaiser, A ;
Cathelin, A ;
Belot, D .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (07) :1443-1450
[2]  
DAMICO S, 2005, ANALOG INTEGR CIRC S, V45, P1
[3]   CIRCUIT ARCHITECTURES FOR HIGH LINEARITY MONOLITHIC CONTINUOUS-TIME FILTERING [J].
DURHAM, AM ;
HUGHES, JB ;
REDMANWHITE, W .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1992, 39 (09) :651-657
[4]  
*FIRB IT NAT PROGR, EN TECHN WIR REC TER
[5]  
GIANNINI V, DATE 2006 PAR FRANC
[6]   A 2.7-V CMOS dual-mode baseband filter for PDC and WCDMA [J].
Hollman, T ;
Lindfors, S ;
Länsirinne, M ;
Jussila, J ;
Halonen, KAI .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (07) :1148-1153
[7]  
Hung CC, 1997, IEEE T CIRC SYST VID, V7, P584
[8]   Analysis and optimization of IIP2 in CMOS direct down-converters [J].
Manstretta, D ;
Svelto, F .
PROCEEDINGS OF THE IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2002, :243-246
[9]   Widely programmable high-frequency continuous-time filters in digital CMOS technology [J].
Pavan, S ;
Tsividis, YP ;
Nagaraj, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (04) :503-511
[10]   A 1.2V BiCMOS class AB log-domain filter [J].
Punzenberger, M ;
Enz, C .
1997 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 1997, 40 :56-57