AIM: Energy-Efficient Aggregation Inside the Memory Hierarchy

被引:4
作者
Ahn, Junwhan [1 ]
Yoo, Sungjoo [2 ]
Choi, Kiyoung [1 ]
机构
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul, South Korea
[2] Seoul Natl Univ, Dept Comp Sci & Engn, Seoul, South Korea
关键词
Processing-in-memory; near-data processing; aggregation; locality-adaptive execution; DRAM;
D O I
10.1145/2994149
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this article, we propose Aggregation-in-Memory (AIM), a new processing-in-memory system designed for energy efficiency and near-term adoption. In order to efficiently perform aggregation, we implement simple aggregation operations in main memory and develop a locality-adaptive host architecture for inmemory aggregation, called cache-conscious aggregation. Through this, AIM executes aggregation at the most energy-efficient location among all levels of the memory hierarchy. Moreover, AIM minimally changes existing sequential programming models and provides fully automated compiler toolchain, thereby allowing unmodified legacy software to use AIM. Evaluations show that AIM greatly improves the energy efficiency of main memory and the system performance.
引用
收藏
页数:24
相关论文
共 48 条
[21]   ImageNet Classification with Deep Convolutional Neural Networks [J].
Krizhevsky, Alex ;
Sutskever, Ilya ;
Hinton, Geoffrey E. .
COMMUNICATIONS OF THE ACM, 2017, 60 (06) :84-90
[22]  
Kyu-Nam Lim, 2012, 2012 IEEE International Solid-State Circuits Conference (ISSCC), P42, DOI 10.1109/ISSCC.2012.6176870
[23]   LLVM: A compilation framework for lifelong program analysis & transformation [J].
Lattner, C ;
Adve, V .
CGO 2004: INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION, 2004, :75-86
[24]  
Lee Chang Joo, 2010, TRHPS2010002 U TEX A
[25]  
Leskovec J., 2014, SNAP DATASETS STANFO
[26]  
LUK CK, 2005, PLDI 05, P190, DOI [DOI 10.1145/1064978.1065034, DOI 10.1145/1065010.1065034]
[27]  
Malewicz G., 2010, P INT C MAN DAT
[28]  
Muralimanohar Naveen, 2009, Rep. HPL- 2009-85, V27, P28
[29]   Active Memory Cube: A processing-in-memory architecture for exascale systems [J].
Nair, R. ;
Antao, S. F. ;
Bertolli, C. ;
Bose, P. ;
Brunheroto, J. R. ;
Chen, T. ;
Cher, C. -Y. ;
Costa, C. H. A. ;
Doi, J. ;
Evangelinos, C. ;
Fleischer, B. M. ;
Fox, T. W. ;
Gallo, D. S. ;
Grinberg, L. ;
Gunnels, J. A. ;
Jacob, A. C. ;
Jacob, P. ;
Jacobson, H. M. ;
Karkhanis, T. ;
Kim, C. ;
Moreno, J. H. ;
O'Brien, J. K. ;
Ohmacht, M. ;
Park, Y. ;
Prener, D. A. ;
Rosenburg, B. S. ;
Ryu, K. D. ;
Sallenave, O. ;
Serrano, M. J. ;
Siegl, P. D. M. ;
Sugavanam, K. ;
Sura, Z. .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2015, 59 (2-3)
[30]   Active pages: A computation model for intelligent memory [J].
Oskin, M ;
Chong, FT ;
Sherwood, T .
25TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, PROCEEDINGS, 1998, :192-203