Abrupt NMOS inverter based on punch-through impact ionization with hysteresis in the voltage transfer characteristics

In this letter, an abrupt NMOS inverter based on punch-through impact ionization is demonstrated for the first time. The slopes for both the rising and the falling edge of the ID (V-GS) device characteristics are less than 10 mV/decade steep which translates into a gain of -80 for the inverter. In addition, the voltage transfer characteristic shows a hysteresis whose width depends on the biasing. The output swing is approximately twice the input voltage swing, which assures proper cascadability of logic gates.