The Development of an Efficient 2-to-4 Decoder in Quantum-Dot Cellular Automata

Quantum-dot cellular automata (QCA) is known as one of the best alternative technologies for CMOS on nano-scale dimensions, which allows the design of digital circuits with high speed and density. Decoders are considered as one of the most widely used combinational circuits. They also play an important role in designing circuits such as FPGA, CLB, and memory addressing. In this paper, we propose an effective design of the 2-to-4 decoder in the QCA technology. The proposed design consists of only three inverter gates and six 3-input majority gates. Two single-layer and three-layer of the proposed 2-to-4 QCA decoder with only 56 and 62 cells are provided and they require 3 and 4 clock cycles respectively. Also, one multi-layer 3-to-8 QCA decoder is developed and implemented using the proposed 2-to-4 QCA decoder. The proposed circuits are simulated using the QCADesigner 2.0.3 tool. A comparison of the proposed 2-to-4 QCA decoder with related designs shows that the proposed decoder has a good performance in terms of the number of cells, the occupied area, and the delay criteria. Also, the QCAPro tool is used to compute the power dissipation of the proposed decoder. Finally, the results are affirmed by physical proofs.