Non-depletion floating layer in SOI LDMOS for enhancing breakdown voltage and eliminating back-gate bias effect

被引:2
作者
Zheng Zhi [1 ]
Li Wei [1 ]
Li Ping [1 ]
机构
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China
关键词
breakdown voltage; back-gate bias effect; self-heating effect; silicon-on-insulator;
D O I
10.1088/1674-1056/22/4/047701
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
A non-depletion floating layer silicon-on-insulator (NFL SOI) lateral double-diffused metal-oxide-semiconductor (LDMOS) is proposed and the NFL-assisted modulated field (NFLAMF) principle is investigated in this paper. Based on this principle, the floating layer can pin the potential for modulating bulk field. In particular, the accumulated high concentration of holes at the bottom of the NFL can efficiently shield the electric field of the SOI layer and enhance the dielectric field in the buried oxide layer (BOX). At variation of back-gate bias, the shielding charges of NFL can also eliminate back-gate effects. The simulated results indicate that the breakdown voltage (BV) is increased from 315 V to 558 V compared to the conventional reduced surface field (RESURF) SOI (CSOI) LDMOS, yielding a 77% improvement. Furthermore, due to the field shielding effect of the NFL, the device can maintain the same breakdown voltage of 558 V with a thinner BOX to resolve the thermal problem in an SOI device.
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页数:5
相关论文
共 19 条
[1]  
[Anonymous], TMA MEDICI 4 2
[2]   High voltage REBULF LDMOS with N+ buried layer [J].
Duan, Baoxing ;
Yang, Yintang ;
Zhang, Bo .
SOLID-STATE ELECTRONICS, 2010, 54 (07) :685-688
[3]   Design of a 1200-V Thin-Silicon-Layer p-Channel SOI LDMOS Device [J].
Hu Sheng-Dong ;
Zhang Ling ;
Luo Xiao-Rong ;
Zhang Bo ;
Li Zhao-Ji ;
Wu Li-Juan .
CHINESE PHYSICS LETTERS, 2011, 28 (12)
[4]   A new structure and its analytical model for the vertical interface electric field of a partial-SOI high voltage device [J].
Hu Sheng-Dong ;
Zhang Bo ;
Li Zhao-Ji ;
Luo Xiao-Rong .
CHINESE PHYSICS B, 2010, 19 (03)
[5]   A review of RESURF technology [J].
Ludikhuize, AW .
12TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS - PROCEEDINGS, 2000, :11-18
[6]   Impact of back-gate bias on the hysteresis effect in partially depleted SOI MOSFETs [J].
Luo Jie-Xin ;
Chen Jing ;
Zhou Jian-Hua ;
Wu Qing-Qing ;
Chai Zhan ;
Yu Tao ;
Wang Xi .
CHINESE PHYSICS B, 2012, 21 (05)
[7]   Ultra-low on-resistance high voltage (> 600 V) SOI MOSFET with a reduced cell pitch [J].
Luo Xiao-Rong ;
Yao Guo-Liang ;
Chen Xi ;
Wang Qi ;
Ge Rui ;
Udrea, Florin .
CHINESE PHYSICS B, 2011, 20 (02)
[8]   Numerical and Experimental Investigation on a Novel High-Voltage (> 600-V) SOI LDMOS in a Self-Isolation HVIC [J].
Luo, Xiaorong ;
Zhang, Bo ;
Lei, Tianfei ;
Li, Zhaoji ;
Xiao, Zhiqiang ;
Hsu, Wesley Chih-Wei ;
Udrea, Florin .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (11) :3033-3043
[9]   New high voltage SOI device structure eliminating substrate bias effects [J].
Nakagawa, A ;
Yamaguchi, S ;
Yasuhara, N ;
Hirayama, K ;
Funaki, H .
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :477-480
[10]  
NARAYANAN EMS, 1995, ISPSD '95 - PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, P218, DOI 10.1109/ISPSD.1995.515038