Simulation of TEDREC Phenomena for 4H-SiC Pin Diode with p/n Type Drift Layer

被引：4
作者：
Nakayama, Koji [1 ]
Hemmi, Tetsuro [1 ]
Asano, Katsunori [1 ]
机构：
[1] Kansai Elect Power Co Inc, Power Engn R&D Ctr, Amagasaki, Hyogo 6610974, Japan
来源：
SILICON CARBIDE AND RELATED MATERIALS 2012 | 2013年 / 740-742卷
关键词：
4H-SiC; Shockley-type stacking fault; pin diode; n-type drift layer; p-type drift layer; TEDREC; EPILAYERS; REDUCTION; DEVICES; SICGT;
D O I：
10.4028/www.scientific.net/MSF.740-742.1107
中图分类号：
O7 [晶体学];
学科分类号：
0702 ; 070205 ; 0703 ; 080501 ;
摘要：
Temperature dependence simulations of forward characteristics for 4H-SiC pin diodes with Shockley-type stacking faults are performed in order to investigate the mechanism of the TEDREC phenomena. The forward voltage drops of both n-type and p-type drift layers at room temperature increase as the length of the Shockley-type stacking fault increases. When the diodes are compared to each other at the same temperature, the differences between the forward voltage drops do not change significantly up to 150 degrees C, but the differences suddenly narrow in the range from 150 degrees C to 200 degrees C. The Shockley-type stacking fault prevents current from flowing at room temperature. The current, however, flows throughout the drifted diode when the temperature is raised.
引用
收藏
页码：1107 / 1110
页数：4
相关论文
共 7 条
  • [1] Long term operation of 4.5kV PiN and 2.5kV JBS diodes
    Lendenmann, H
    Dahlquist, F
    Johansson, N
    Söderholm, R
    Nilsson, PA
    Bergman, JP
    Skytt, P
    [J]. SILICON CARBIDE AND RELATED MATERIALS, ECSCRM2000, 2001, 353-356 : 727 - 730
  • [2] Stacking faults in 3C-, 4H-, and 6H-SiC polytypes investigated by an ab initio supercell method -: art. no. 155204
    Lindefelt, U
    Iwata, H
    Oberg, S
    Briddon, PR
    [J]. PHYSICAL REVIEW B, 2003, 67 (15)
  • [3] Behavior of Stacking Faults in TEDREC Phenomena for 4.5 kV SiCGT
    Nakayama, K.
    Sugawara, Y.
    Miyanagi, Y.
    Asano, K.
    Ogata, S.
    Okada, S.
    Izumi, T.
    Tanaka, A.
    [J]. SILICON CARBIDE AND RELATED MATERIALS 2007, PTS 1 AND 2, 2009, 600-603 : 1175 - 1178
  • [4] 180kVA three phase SiCGT inverter utilizing novel VF degradation reduction phenomena for SiC devices
    Sugawara, Y.
    Miyanagi, Y.
    Nakayama, K.
    Asano, K.
    Ogata, S.
    Okada, S.
    Izumi, T.
    Tanaka, A.
    [J]. PROCEEDINGS OF THE 19TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS, 2007, : 273 - +
  • [5] Techniques for minimizing the basal plane dislocation density in SiC epilayers to reduce Vf drift in SiC bipolar power devices
    Sumakeris, J. J.
    Bergman, J. P.
    Das, M. K.
    Hallin, C.
    Hull, B. A.
    Janzen, E.
    Lendenmann, H.
    O'Loughlin, M. J.
    Paisley, M. J.
    Ha, S.
    Skowronski, M.
    Palmour, J. W.
    Carter, C. H.
    [J]. Silicon Carbide and Related Materials 2005, Pts 1 and 2, 2006, 527-529 : 141 - 146
  • [6] Investigation of basal plane dislocations in the 4H-SiC epilayers grown on {0001} substrates
    Tsuchida, A
    Miyanagi, T
    Kamata, I
    Nakamura, T
    Izumi, K
    Nakayama, K
    Ishii, R
    Asano, K
    Sugawara, Y
    [J]. SILICON CARBIDE AND RELATED MATERIALS 2004, 2005, 483 : 97 - 100
  • [7] Growth of thick 4H-SiC(0001) epilayers and reduction of basal plane dislocations
    Tsuchida, H
    Kamata, I
    Miyanagi, T
    Nakamura, T
    Nakayama, K
    Ishii, R
    Sugawara, Y
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 2005, 44 (24-27): : L806 - L808
1