Dedicated FPGA Communication Architecture and Design for a Large-Scale Neuromorphic System

被引:0
作者
Thanasoulis, V. [1 ]
Partzsch, J. [1 ]
Hartmann, S. [1 ]
Mayr, C. [1 ]
Schueffny, R. [1 ]
机构
[1] Tech Univ Dresden, Parallel VLSI Syst & Neuromorph Circuits, Dresden, Germany
来源
2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2012年
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The communication infrastructure is a crucial part of neuromorphic VLSI systems. A sophisticated network is required for the transmission of pulse events among the individual neuron-and-synapse circuits and the configuration data for the components of the system. We present a packet-based communication network implemented on FPGA that provides pulse stimulation, inter-node connectivity and allows the complete control and configuration of the neuromorphic system by a host unit. The design deploys a specific architecture for optimized throughput and implements a reliable and ordered data delivery. It employs also a large Playback/Trace memory that offers pulse event replay and recording of the produced neuronal activity. Altogether, our implementation is more versatile than recent FPGA-based neuromorphic infrastructures, allowing for fast system configuration, stimulation and monitoring.
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收藏
页码:877 / 880
页数:4
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