A New Selective Loop Bias Mapping Phase Disposition PWM With Dynamic Voltage Balance Capability for Modular Multilevel Converter

被引:98
作者
Mei, Jun [1 ]
Shen, Ke [2 ]
Xiao, Bailu [3 ]
Tolbert, Leon M. [3 ,4 ]
Zheng, Jianyong [1 ]
机构
[1] Southeast Univ, Jiangsu Prov Key Lab Smart Grid Technol & Equipme, Sch Elect Engn, Nanjing 210096, Jiangsu, Peoples R China
[2] Harbin Inst Technol, Dept Elect Engn, Harbin 150001, Peoples R China
[3] Univ Tennessee, Dept Elect Engn & Comp Sci, Ctr Ultra Wide Area Resilient Elect Energy Transm, Knoxville, TN 37996 USA
[4] Oak Ridge Natl Lab, Oak Ridge, TN 37831 USA
关键词
Dynamic voltage balance; modular multilevel converter (MMC); phase disposition (PD) pulsewidth modulation (PWM) (PDPWM); selective loop bias mapping (LBM) (SLBM); TRANSFORMERLESS; SUPPRESSION;
D O I
10.1109/TIE.2013.2253069
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents an improved phase disposition pulsewidth modulation (PWM) (PDPWM) for the modular multilevel converter (MMC) which is based on the selective loop bias mapping (SLBM) method. Its main idea is to change the bias of the PDPWM carrier wave cycling according to the balance situation of the system. This new modulation method can operate at symmetric condition to generate an output voltage with as many as 2N + 1 levels, and by SLBM, the voltages of the upper/lower arm capacitors can be well balanced. Compared to carrier phase-shifted PWM, this method is more easily to be realized and has much stronger dynamic regulation ability. Specially, this method has no issues of sorting, which makes it suitable for MMC with a large number of submodules in one leg. With simulation and experiments, the validity of the proposed method has been shown.
引用
收藏
页码:798 / 807
页数:10
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