共 10 条
- [1] Howard J., 2010, PROCEEDINGS OF THE I
- [2] Ioannou N., 2011, Proceedings 2011 International Conference on Parallel Architectures and Compilation Techniques (PACT), P131, DOI 10.1109/PACT.2011.19
- [3] Koufaty D., 1999, Proceedings of the 1999 International Conference on Parallel Processing, P181, DOI 10.1109/ICPP.1999.797403
- [4] Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors [J]. 28TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, PROCEEDINGS, 2001, : 40 - 51
- [5] Papadopoulos K, 2008, I SYMP CONSUM ELECTR, P1, DOI 10.1109/ICELMACH.2008.4800190
- [6] Petrides P., 2011, PROCEEDINGS OF THE T, P81
- [7] Sherwood T, 2000, INT SYMP MICROARCH, P42, DOI 10.1109/MICRO.2000.898057
- [8] Timothy M., 2007, PROCEEDINGS OF THE 2
- [9] Trancoso P, 2009, CF'09: CONFERENCE ON COMPUTING FRONTIERS & WORKSHOPS, P117
- [10] Transaction Processing Council, 2006, TPC BENCHMARK H DECI