Ge gate stacks based on Ge oxide interfacial layers and the impact on MOS device properties

被引:29
作者
Takagi, Shinichi [1 ]
Zhang, Rui [1 ]
Takenaka, Mitsuru [1 ]
机构
[1] Univ Tokyo, Dept Elect Engn & Informat Syst, Bunkyo Ku, Tokyo 1138656, Japan
关键词
Germanium; MOSFETs; Interface; Interface state density; Mobility; ELECTRICAL-PROPERTIES; N-FETS; P-FETS; GERMANIUM; PASSIVATION; CMOS; SUPPRESSION; PMOSFETS; GE(100); GEO2/GE;
D O I
10.1016/j.mee.2013.04.034
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
CMOS utilizing high mobility Ge channels on Si substrates is expected to be one of promising devices for high performance and low power advanced LSIs. Here, one of the most critical issues in Ge MOSFETs is the realization of gates stacks with superior MOS interfaces. We have proposed novel Ge gate stack technology using ultrathin Ge oxide interfacial layers (ILs). The Ge ILs are formed by exposing ECR oxygen plasma to thin Al2O3 on Ge substrates, which is called plasma post oxidation. Here, Al2O3 serves as a sufficient oxygen barrier that suppresses the growth of unnecessarily-thick GeOx IL, thanks to its intrinsic oxygen permeability. The relationship between the GeOx thickness and interface state density (D-it) is evaluated. Also, in order to further reduce EOT, we have introduced a revised version of gate stack formation using HfO2/Al2O3 stacks. The role of ultrathin Al2O3 films on the properties of the gate stacks is studied. As a result, HfO2/Al2O3/GeOx/Ge gate stacks having EOT of 0.72 nm as the thinnest value have been realized with the excellent interface quality. High electron mobility of 754 and 690 cm(2)/Vs and hole mobility of 596 and 546 cm(2)/Vs have been obtained in EOT of 0.82 and 0.76 nm, respectively. (C) 2013 Elsevier B.V. All rights reserved.
引用
收藏
页码:389 / 395
页数:7
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