Investigation on Die Shift Issues in the 12-in Wafer-Level Compression Molding Process

被引：22

作者：

Bu, Lin ^{[1
]}

Ho, Siowling ^{[1
]}

Velez, Sorono Dexter ^{[1
]}

Chai, Taichong ^{[1
]}

Zhang, Xiaowu ^{[1
]}

机构：

[1] Agcy Sci Technol & Res, Inst Microelect, Singapore 117685, Singapore

来源：

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2013年 / 3卷 / 10期

关键词：

Coefficient of thermal expansion (CTE); die shift; embedded water-level packaging (eWLP); mold flow effect; nonlinear;

D O I：

10.1109/TCPMT.2013.2268192

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Die shift issues that arise in embedded wafer-level packaging because of the mold flow process is investigated in this paper, along with solution strategies to address them. The nonlinearity trend of the die shift in the experimental inspection is explained and captured by the numerical simulation with a consideration of the coefficient of thermal expansion effect coupled with the mold flow effect. Optimizing the initial diameter of molding compounds, increasing the thickness of molding compounds, and reducing the filling speed are the three solutions we demonstrate for reducing the drag force. Die shift generated by the mold flow could be reduced by optimizing these controllable parameters.

引用

页码：1647 / 1653

页数：7

共 9 条

[1] VOLUME OF FLUID (VOF) METHOD FOR THE DYNAMICS OF FREE BOUNDARIES [J].

HIRT, CW ;

NICHOLS, BD .

JOURNAL OF COMPUTATIONAL PHYSICS, 1981, 39 (01) :201-225

[2] 3-D Numerical and Experimental Investigations on Compression Molding in Multichip Embedded Wafer Level Packaging [J].

Ji, Lin ;

Sorono, Dexter Velez ;

Chai, Tai Chong ;

Zhang, Xiaowu .

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2013, 3 (04) :678-687

[3] Wafer Level embedded System in Package (WL-eSiP) for Mobile Applications [J].

Kang, In-Soo ;

Jung, Gi-Jo ;

Jeon, Byoung-Yool ;

Yoo, Jae-Hyouk ;

Jeong, Seong-Hun .

2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, :309-315

[4]

Khong CH, 2009, 2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, P535, DOI 10.1109/ECTC.2009.5074066

[5]

Kim HJ, 2011, ELEC COMP C, P78, DOI 10.1109/ECTC.2011.5898495

[6] Wafer Level Embedding Technology for 3D Wafer Level Embedded Package [J].

Kumar, Aditya ;

Xia Dingwei ;

Sekhar, Vasarla Nagendra ;

Lim, Sharon ;

Keng, Chin ;

Sharma, Gaurav ;

Rao, Vempati Srinivas ;

Kripesh, Vaidyanathan ;

Lau, John H. ;

Kwong, Dim-Lee .

2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, :1289-+

[7]

Mazuir J., 2011, 2011 IEEE 13th Electronics Packaging Technology Conference (EPTC 2011), P747, DOI 10.1109/EPTC.2011.6184519

[8] Solutions Strategies for Die Shift Problem in Wafer Level Compression Molding [J].

Sharma, Gaurav ;

Kumar, Aditya ;

Rao, Vempati Srinivas ;

Ho, Soon Wee ;

Kripesh, Vaidyanathan .

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2011, 1 (04) :502-509

[9] Embedded Wafer Level Packages with Laterally Placed and Vertically Stacked Thin Dies [J].

Sharma, Gaurav ;

Rao, Vempati Srinivas ;

Kumar, Aditya ;

Su, Nandar ;

Ying, Lim Ying ;

Houe, Khong Chee ;

Lim, Sharon ;

Sekhar, Vasarla Nagendra ;

Rajoo, Ranjan ;

Kripesh, Vaidyanathan ;

Lau, John H. .

2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, :1537-1543

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