共 50 条
- [1] Research on Construction of Low-Latency S-Boxes and Bidirectional Low-Latency Properties Tien Tzu Hsueh Pao/Acta Electronica Sinica, 2024, 52 (11): : 3769 - 3779
- [3] A further study on bridge structures and constructing bijective S-boxes for low-latency masking Designs, Codes and Cryptography, 2023, 91 : 3709 - 3739
- [5] Low-Latency Hardware Masking of PRINCE CONSTRUCTIVE SIDE-CHANNEL ANALYSIS AND SECURE DESIGN, COSADE 2021, 2021, 12910 : 148 - 167
- [6] Low-latency hardware masking with application to AES IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020, 2020 (02): : 300 - 326
- [7] Dynamic inhomogeneous S-Boxes design for efficient AES masking mechanisms J. China Univ. Post Telecom., 2008, 2 (72-76):
- [10] Time Sharing-A Novel Approach to Low-Latency Masking IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024, 2024 (03): : 249 - 272