3-D Analytical Modeling and comprehensive analysis of SCEs of a high-K gate stack dual-material tri-gate Silicon-On-Insulator MOSFET with dual-material bottom gate

被引：0

作者：

Banerjee, Pritha ^{[1
]}

Saha, Priyanka ^{[1
]}

Sarkar, Subir Kumar ^{[1
]}

机构：

[1] Jadavpur Univ, Dept Elect & Telecommun Engn, Kolkata 700032, India

来源：

2017 IEEE CALCUTTA CONFERENCE (CALCON) | 2017年

关键词：

Tri-gate MOSFET; High-K gate stack; Short Channel Effects; 3D Poisson's equation; analytical modeling; DIBL; NOTHING MOSFET;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This present work focuses on physics based 3-D analytical model derivation of the proposed dual material tri-gate Silicon On Insulator MOSFET with a dual-material bottom gate. The popular parabolic potential approximation method with suitable boundary conditions has been used to solve the 3-D Poisson's equation in the channel region. Surface potential model is then utilized to develop the electric field distribution expression of the present model. In addition, the immunity of the device towards the undesirable Short Channel Effects (SCEs) including threshold voltage roll-off (TVRO), Drain-induced barrier lowering (DIBL), Hot carrier effects (HCE) has been studied in detail. The model results obtained are in close agreement with SILVACO ATLAS based simulation data, thus establishing the accuracy of our derived analytical model.

引用

页码：130 / 133

页数：4

共 20 条

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