A Lightweight LFSR-Based Strong Physical Unclonable Function Design on FPGA

被引:20
作者
Hou, Shen [1 ,2 ]
Guo, Yang [1 ]
Li, Shaoqing [1 ]
机构
[1] Natl Univ Def Technol, Sch Comp, Changsha 410073, Hunan, Peoples R China
[2] Informat Engn Univ, Dept Basic Courses, Luoyang 471003, Peoples R China
基金
中国国家自然科学基金;
关键词
Hardware security; physical unclonable functions (PUFs); linear feedback shift register; FPGA; lightweight;
D O I
10.1109/ACCESS.2019.2917259
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Physical unclonable function (PUF), a reliable physical security primitive, can be implemented in FPGAs and ASICs. Strong PUF is an important PUF classification that provides a large "Challenge-Response" pairs (CRP) space for device authentication. However, most of the traditional strong PUF designs represented by the arbiter PUF are difficult to implement on FPGA. We propose a new lightweight strong PUF design that can dynamically reconfigure while maintaining high entropy and large CRP space. We implement the PUF on a 28-nm FPGA. The experimental results show that the uniformity of the PUF is 49.8%, the uniqueness is 49.9%, which is close to the ideal value, and the hardware overhead is very small. This design is easy to implement and suitable for device authentication on FPGA.
引用
收藏
页码:64778 / 64787
页数:10
相关论文
共 50 条
[41]   ProHys PUF: A Proteresis- Hysteresis switch based Physical Unclonable Function [J].
Khan, Salma ;
Azeemuddin, Syed ;
Sohel, Mohammed Arifuddin .
INTEGRATION-THE VLSI JOURNAL, 2023, 89 :207-216
[42]   DScanPUF: A Delay-Based Physical Unclonable Function Built Into Scan Chain [J].
Zheng, Yu ;
Zhang, Fengchao ;
Bhunia, Swarup .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (03) :1059-1070
[43]   A survey on physical unclonable function (PUF)-based security solutions for Internet of Things [J].
Shamsoshoara, Alireza ;
Korenda, Ashwija ;
Afghah, Fatemeh ;
Zeadally, Sherali .
COMPUTER NETWORKS, 2020, 183
[44]   FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices [J].
Al-Shatari, Mohammed ;
Hussin, Fawnizu Azmadi ;
Abd Aziz, Azrina ;
Witjaksono, Gunawan ;
Xuan-Tu Tran .
IEEE ACCESS, 2020, 8 :207610-207618
[45]   Design of Lightweight Hash Function based on Iterate [J].
Gao, Shujing ;
Zhang, Ruiquan ;
Zhang, Wei .
APPLIED DECISIONS IN AREA OF MECHANICAL ENGINEERING AND INDUSTRIAL MANUFACTURING, 2014, 577 :786-789
[46]   The Design of Intelligent Function Generator Based on FPGA [J].
Li Huiwu ;
Ma Xihong .
ISTM/2009: 8TH INTERNATIONAL SYMPOSIUM ON TEST AND MEASUREMENT, VOLS 1-6, 2009, :1152-1155
[47]   Chaos-Based Lightweight Cryptographic Algorithm Design and FPGA Implementation [J].
Guang, Yerui ;
Yu, Longfei ;
Dong, Wenjie ;
Wang, Ya ;
Zeng, Jian ;
Zhao, Jiayu ;
Ding, Qun .
ENTROPY, 2022, 24 (11)
[48]   Integrated Design Techniques of Physical Unclonable Function and Multi-bit Parallel Exclusive OR Operations [J].
Li, Gang ;
Zhou, Junjie ;
Wang, Pengjun ;
Zhang, Maolin ;
Guo, Yufeng .
JOURNAL OF ELECTRONICS & INFORMATION TECHNOLOGY, 2024, 46 (11) :4101-4111
[49]   Reliability Analysis and Performance Evaluation of STT-MRAM-Based Physical Unclonable Function [J].
Wang, You ;
Wang, Hanchen ;
Zhao, Weisheng ;
Cai, Hao .
SPIN, 2020, 10 (02)
[50]   A Novel Cross-Platform Physically Unclonable Function for Emerging FPGA-based IoT Devices [J].
Das, Dipnarayan ;
Roy, Sourav ;
Mahalat, Mahabub Hasan ;
Sen, Bibhash .
2022 ASIAN HARDWARE ORIENTED SECURITY AND TRUST SYMPOSIUM (ASIANHOST), 2022,