A Passive PEEC-Based Micromodeling Circuit for High-Speed Interconnection Problems

被引:22
|
作者
Dou, Yuhang [1 ]
Wu, Ke-Li [1 ]
机构
[1] Chinese Univ Hong Kong, Dept Elect Engn, Hong Kong, Hong Kong, Peoples R China
关键词
Electromagnetic (EM) modeling; equivalent circuit; model order reduction (MOR); partial element equivalent circuit (PEEC); signal integrity (SI); MODEL ORDER REDUCTION; POSITIVE REALNESS;
D O I
10.1109/TMTT.2017.2779484
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A passive partial element equivalent circuit (PEEC)-based micromodeling circuit is proposed for time-domain simulation of a high-speed interconnection problem. This physics-based model order reduction method derives a concise and physically meaningful circuit model from the PEEC model by absorbing its insignificant nodes. To maintain high fidelity of the original electromagnetic PEEC model, the concept of pseudoinductor is introduced to the node-absorbing process. The derivation process does not involve any matrix inversion or decomposition and is highly suitable for GPU parallel computations. Passivity of the micromodeling circuit is ensured by a new passivity checking and enforcement method proposed for the first time. As the scale of the micromodeling circuit can be one order of magnitude smaller than that of the original PEEC model, the time-domain simulation can be three orders of magnitude faster. Two practical examples are given to demonstrate the high fidelity, scalability, and accuracy of the proposed micromodeling circuit, showing excellent applicability to high-speed interconnection problems.
引用
收藏
页码:1201 / 1214
页数:14
相关论文
共 50 条
  • [1] A Passive Full-Wave Micromodeling Circuit for Packaging and Interconnection Problems
    Dou, Yuhang
    Wu, Ke-Li
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2019, 67 (06) : 2197 - 2207
  • [2] Scalable circuit models for passive high-speed interconnection structures
    Dhaene, Tom
    4TH INTERNATIONAL INDUSTRIAL SIMULATION CONFERENCE 2006, 2006, : 297 - 299
  • [3] Efficient PEEC-based inductance extraction using circuit-aware techniques
    Hu, HT
    Sapatnekar, SS
    ICCD'2002: IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 2002, : 434 - 439
  • [4] HIGH-SPEED INTERCONNECTION OF WORKSTATIONS - CONCEPTS, PROBLEMS AND EXPERIENCES
    HEINRICHS, B
    MEUSER, T
    SPANIOL, O
    DECENTRALIZED AND DISTRIBUTED SYSTEMS, 1993, 39 : 3 - 22
  • [5] CROSSTALK IN THE INTERCONNECTION BUS FOR A HIGH-SPEED DIGITAL LOGIC-CIRCUIT
    PARKER, BH
    RAY, AK
    CHASSEMLOOY, Z
    INTERNATIONAL JOURNAL OF ELECTRONICS, 1994, 76 (02) : 265 - 269
  • [6] ANALYSIS OF MULTILAYER INTERCONNECTION LINES FOR A HIGH-SPEED DIGITAL INTEGRATED-CIRCUIT
    FUKUOKA, Y
    ZHANG, Q
    NEIKIRK, DP
    ITOH, T
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1985, 33 (06) : 527 - 532
  • [7] A PEEC-Based Concise Broadband Physical Circuit Modeling Method With Parameter Extraction for PCB Inductive Components
    He, Junping
    Tao, Sili
    Wu, Huazhao
    IEEE TRANSACTIONS ON POWER ELECTRONICS, 2020, 35 (10) : 10852 - 10862
  • [8] INTERCONNECTION OF HIGH-SPEED LOGIC CIRCUITS
    JANISZ, T
    MARTIN, RC
    IEEE TRANSACTIONS ON COMPUTERS, 1970, C 19 (09) : 831 - &
  • [9] Optical Interconnection for High-speed Routers
    Nishimura, Shinji
    Shinoda, Kazunori
    Lee, Yong
    Yuki, Fumio
    Takemoto, Takashi
    Yamashita, Hiroki
    Tsuji, Shinji
    Nido, Masaaki
    Namiwaka, Masahiko
    Kaneko, Taro
    Kurata, Kazuhiko
    Yanagimachi, Shigeyuki
    Ikeda, Naoya
    2011 OPTICAL FIBER COMMUNICATION CONFERENCE AND EXPOSITION (OFC/NFOEC) AND THE NATIONAL FIBER OPTIC ENGINEERS CONFERENCE, 2011,
  • [10] MULTITASKING IN HIGH-SPEED INTERCONNECTION SYSTEMS
    CHLAMTAC, I
    KIENZLE, MG
    COMPUTER NETWORKS AND ISDN SYSTEMS, 1993, 25 (06): : 701 - 716