High-level customization framework for application-specific NoC architectures

被引:2
作者
Anagnostopoulos, Iraklis [1 ]
Bartzas, Alexandros [1 ]
Filippopoulos, Iason [2 ]
Soudris, Dimitrios [1 ]
机构
[1] Natl Tech Univ Athens, Sch Elect & Comp Engn, Athens, Greece
[2] Norwegian Univ Sci & Technol, Dept Elect & Telecommun, N-7034 Trondheim, Norway
关键词
Network-on-Chip; Design methodology; Automation framework; Mapping; Priorities assignment; Buffer sizing; Regular and irregular topologies; DESIGN SPACE EXPLORATION; NETWORK; CHIP; CORE;
D O I
10.1007/s10617-013-9114-5
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Network-on-Chip (NoC) has been recognized as the new paradigm to interconnect and organize a high number of cores. NoCs address global communication issues in System-on-Chips (SoC) involving communication-centric design and implementation of scalable communication structures evolving application-specific NoC design as a key challenge to modern SoC design. In this paper we present a SystemC customization framework and methodology for automatic design and evaluation of regular and irregular NoC architectures. The presented framework also supports application-specific optimization techniques such as priority assignment, node clustering and buffer sizing. Experimental results show that generated regular NoC architectures achieve an average of 5.5 % lower communication-cost compared to other regular NoC designs while irregular NoCs proved to achieve on average 4.5xhigher throughput and 40 % network delay reduction compared to regular mesh topologies. In addition, employing a buffer sizing algorithm we achieve a reduction in network's power consumption by an average of 45 % for both regular and irregular NoC design flow.
引用
收藏
页码:339 / 361
页数:23
相关论文
共 42 条
  • [1] High-level customization framework for application-specific NoC architectures
    Iraklis Anagnostopoulos
    Alexandros Bartzas
    Iason Filippopoulos
    Dimitrios Soudris
    Design Automation for Embedded Systems, 2012, 16 : 339 - 361
  • [2] Application-Specific Processing using High-Level Synthesis for Networks-on-Chip
    Rettkowski, Jens
    Goehringer, Diana
    2017 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2017,
  • [3] Prediction Modeling for Application-Specific Communication Architecture Design of Optical NoC
    Trajkovic, Jelena
    Karimi, Sara
    Hangsan, Samantha
    Zhang, Wenlu
    ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2022, 21 (04)
  • [4] Bandwidth/Fault tolerance/Contention Aware Application-Specific NoC Using PSO as a Mapping Generator
    Fekr, Atena Roshan
    Khademzadeh, Ahmad
    Janidarmian, Majid
    Bokharaei, Vahhab Samadi
    WORLD CONGRESS ON ENGINEERING, WCE 2010, VOL I, 2010, : 247 - 252
  • [5] Chance of Vulnerability Reduction in Application-Specific NoC through Distance Aware Mapping Algorithm
    Janidarmian, Majid
    Fekr, Atena Roshan
    Bokharaei, Vahhab Samadi
    IAENG TRANSACTIONS ON ENGINEERING TECHNOLOGIES, VOL 6, 2011, 1373
  • [6] SystemC NoC Simulation as the Alternative to the HDL and High-level Modeling
    Romanov, Aleksandr
    Ivannikov, Aleksandr
    2016 18TH CONFERENCE OF OPEN INNOVATIONS ASSOCIATION AND SEMINAR ON INFORMATION SECURITY AND PROTECTION OF INFORMATION TECHNOLOGY (FRUCT-ISPIT), 2016, : 285 - 290
  • [7] Fault-Tolerant Application-Specific Topology-Based NoC and Its Prototype on an FPGA
    Bhanu, P. Veda
    Govindan, Rahul
    Kumar, Rajat
    Singh, Vishal
    Soumya, J.
    Cenkeramaddi, Linga Reddy
    IEEE ACCESS, 2021, 9 : 76759 - 76779
  • [8] A framework for high-level simulation and optimization of fine-grained reconfigurable architectures
    Pasha, Muhammad Adeel
    Farooq, Umer
    Siddiqui, Bilal
    SIMULATION-TRANSACTIONS OF THE SOCIETY FOR MODELING AND SIMULATION INTERNATIONAL, 2019, 95 (08): : 737 - 751
  • [9] A multi-objective architecture optimization method for application-specific NoC design
    Xu, Changqing
    Liu, Yi
    Yang, Yintang
    2018 31ST IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2018, : 130 - 135
  • [10] Reconfigurable topology synthesis for application-specific NoC on partially dynamically reconfigurable systems
    Huang, Jinglei
    Xu, Xiaodong
    Wang, Nan
    Chen, Song
    INTEGRATION-THE VLSI JOURNAL, 2019, 65 : 331 - 343