VLSI Implementation of an Adaptive Block Partition Decision Object-Detection Design for Real-Time 4K2K Video Display

被引:1
作者
Chen, Shih-Lun [1 ]
Tuan, Min-Chun [1 ]
机构
[1] Chung Yuan Christian Univ, Dept Elect Engn, Taoyuan 32023, Taiwan
来源
JOURNAL OF DISPLAY TECHNOLOGY | 2016年 / 12卷 / 12期
关键词
Application-specific integrated circuits (ASICs); block partition; edge detection; FPGA; image processing; object detection; very large-scale integration (VLSI); ALGORITHM; FEATURES;
D O I
10.1109/JDT.2016.2611617
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, an adaptive block partition decision methodology is presented for very large-scale integration (VLSI) implementation of object-detection for real-time ultrahigh-definition (4K2K) resolution video displaying. The proposed adaptive block partition decision algorithm includes a data controller, a gray-level generator, a subblock difference module, and an edge detector. The edge detector is designed for discovering edges in images using an efficient edge-catching technique. An adaptive block partition decision technique was added to enhance the shapes of objects and to decrease the edge distortion effects. Furthermore, a threshold constraint is used to set parameters for different sizes of blocks. A statistic methodology of object detection is also used to determine whether it is necessary to trigger an alert signal or not. The VLSI architecture of the proposed design contains 6.99-K gate counts. Its power consumption is 1.63 mW and its operating frequency is to 374.5 MHz by using a 90-nm CMOS technology. Compared with previous designs, the proposed design not only achieves reduction of more silicon area, but also increases the processing throughput, and accuracy of object-detection for real-time video display.
引用
收藏
页码:1570 / 1580
页数:11
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