Analysis and Design of 2nd Order Sigma-Delta Modulator for Audio Applications

This paper describes a top-down approach to design a Sigma-Delta based modulator for analog to digital conversion. The primary focus is on designing an ADC for audio application, thus, the conversion is done on a 22.05 kHz bandwidth with a 16-bit resolution (CD quality). The behavioural code of the modulator is created first to check the signal ranges on internal nodes. Next, the circuit non-idealities, such as, finite Op-Amp gain, finite latency of Op-Amp and comparator offset are introduced to derive the tolerable limits and the specification of sub-blocks. Later, the individual blocks are carefully designed in 0.35 mu m CMOS technology and are integrated. SPICE-based simulation is carried out on the entire circuit and the results are validated with MATLAB.