A post-linearization technique for the cascode complementary metal oxide semiconductor (CMOS) low noise amplifier (LNA) is presented. The proposed method uses an additional folded cascode positive-channel metal oxide semiconductor field-effect transistor for sinking the third-order intermodulation distortion (IMD3) current generated by the common source stage, while minimizing the degradation of gain and noise figure. This technique is applied to enhance the linearity of CMOS LNA using 0.18-mu m technology. The LNA achieved +13.3-dBm IIP3 with 12.8-dB gain, 1.4 dB NF at 2 GHz consuming 8 mA from a 1.8-V supply.